Xavity Audio
Xavity Audio platforms are at the heart of every high channel, high performance AVB professional audio endpoint products shipping in the market today!
Xavity Audio targets include:
- Xilinx FPGAs
- Analog Devices Blackfin
- (Coming Soon) Altera FPGAs
Xavity Audio Key Features include:
- AVB IEEE 802.1 standards (for endpoint functionality)
- IEEE 802.1Q-2011, Clause 10 Multiple Registration Protocol (MRP)
- IEEE 802.1Q-2011, Clause 11 VLAN Topology Management (MVRP)
- IEEE 802.1Q-2011, Clause 34 Forwarding and Queuing for Time Sensitive Streams (formerly 802.1 Qav)
- IEEE 802.1Q-2011, Clause 35 Stream Reservation Protocol (SRP, formerly 802.1Qat)
- IEEE 8021.AS-2011 Timing and Synchronization for Time-Sensitive Applications in Bridged Local Area Networks
- Transports
- IEEE 1722, PCM linear 24 bit (48 kHz, 96 kHz, 192 kHz)
- AVB Configuration Protocol (IEEE 1722.1)
- Full Support for 1722.1 ADP (Discovery Protocol)
- Full Support for 1722.1 ACMP (Connection Management Protocol)
- Support of 1722.1 AECP Commands (Control Protocol)
- Additional functionality
- Media Clock Recovery
- Audio Metering
- Failsafe Network Firmware Update
- Platform capability (using 1Gbps Ethernet with default maximum 75% SRP setting for media usage, platform and target dependent)
- Up to 463 x 463 audio channels (@ 48kHz), 7 60-channel streams & 1 43-channel stream x 7 60-channel streams& 1 43-channel stream
- Up to 192 x 192 audio channels (@ 48kHz), 96 2-channel streams x 96 2-channel streams
- Up to 119 x 119 audio channels (@ 48kHz), 119 1-channel streams x 119 1-channel streams
- Up to Dual 1Gbps ports (platform dependent)
- Stream-based glitch-free redundancy (on supported targets/platforms)
- Host Processor Control Interface
- IDL-based software API (C and C++ versions)
- Portable SDK (source provided) for multiple host platforms
- API reference
- Reference Designs
- Hardware
- Reference schematics
- Reference BOM
- Gateware (HDL only on FPGA platforms)
- Reference project
- Sample code
- TDM module
- Firmware